Errors in the decoder of an addressable storage module are able to have a devastating effect in applications critical to security if, for instance, as a result of one such error the content of another storage cell than the one that was addressed is output, or if a storage cell is overwritten unintentionally. Therefore, such errors have to be detected as quickly as possible after they appear, in order to stop the application in such a case, or at least to block especially security-critical functions that could be affected by the error.
A self-testing device for a data memory is known from German Published Patent Application No. 43 17 175, which permits detecting a simultaneous access, to two or more storage cells of a data memory, which originates from a malfunction of an assigned address decoder. This customary self-test device is in a position to detect a decoder error immediately at the point in time of its first appearance. However, a disadvantage is that the self-test device, since it accesses selection lines between the address coder and a memory matrix of the data memory, has to be integrated with the decoder and the memory matrix on the same semiconductor substrate. Since the self-test device has circuit components specific to it, it takes up space on the semiconductor substrate, which increases the costs of a data memory that is equipped with a self-test device. This inherent cost disadvantage has as the result that such a data memory is used only in special applications that require a high degree of security. Therefore, it will be manufactured in clearly smaller piece numbers than an otherwise comparable data memory that does not have the self-test device, so that the cost disadvantage of the data memory having the self-test device is clearly greater than would be equivalent to the over-usage of substrate area by the self-test device.
Therefore, there is a need for design approaches which permit checking an address decoder of a data memory, without specialized circuit components being required for it. One known design approach is, in an address decoder of n bit width, to select all 2n different addresses, that are represented by the n address bits, one after another as a base address, to write the value 1 to the base address, and to write the value 0 to all Hamming addresses to this base address, that is, those addresses that differ from the base address by exactly one bit, and to check whether the value of the base address has changed. The disadvantage of this method is that the data content of the checked memory is destroyed after the checking. Such a method is applicable at the start of an application, before relevant data are written into the memory, but then it leads to a startup delay of the application, which is a nuisance. In order to avoid the startup delay, and to detect errors that occur during current application, it would be desirable to carry out a test in real time, while the application is running. However, the above test is only suitable for being carried out in real time if it is known that the content of the data memory is no longer needed, which will only be true in exceptional cases.
Even if additional storage space is available, at which the content of the data memory to be checked can be backed up in the mean time, in order to reproduce it later, it has to be ensured that enough time is available for carrying out the test, because, if the test has to be broken off, to take up the normal operation of the application again, in any case time will be required to reproduce the original content of the data memory, and that is time which is not always available in real time applications.